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[1k以上] Pspice

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秒答网 发表于 2017-12-1 08:46:24 | 显示全部楼层 |阅读模式
1000元以上:1.        Hand calculations.Design a CMOS (four or more stages) amplifier for the following specifications.  The first stage of the amplifier must be a differential amplifier:
VDD =  VSS = 2.5 V
Av > 4,000 V/V, larger gain is better
Phase margin = 40 to 60
Unity-gain Bandwidth (GB) > 10 MHz
Slew Rate (SR) >10 V/μs for CL = 10 pF
-1.0 V ≤ Input Common-Mode Range (ICMR) ≤ 1.5 V
Output Voltage Range ± 1.2 V or better
Number of active devices not to exceed 20
Total sum of all resistors not to exceed 100 kΩ
Channel length of all devices = 0.25 μm
You’re written Project Report Should Include the Following (in the same order):
1.        Honor Code signed copy of this sheet.  Both members must sign.  You will get zero in project if you do
      not submit this signed sheet.
1.        Discussion – It is the most important part of the report.
2.        Final design with currents through all devices and node voltages as calculated by SPICE.  Put it in the
      tabular form
1.        SPICE DC Transfer characteristic, with output range mark-down
2.        SPICE small-signal gain magnitude and phase vs. frequency plots with Phase Margin (PM) and               
unity-gain Bandwidth (GB) mark-downs.  These plots must be provided for each amplifier stage.
6.        Variation of out-put voltage as a function of time for a fast-rising step, pulse, square-input or for a      
very high-frequency sinusoidal signal input, with SR mark-down.
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4万

智力

5697

体力

5万

品德

院士

博士

Rank: 8Rank: 8

QQ
 楼主| 秒答网 发表于 2017-12-1 09:47:49 | 显示全部楼层
bro
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